@Article{LopesFoDAmo:2017:ToJPIm,
author = "Lopes Filho, Antonio and D'Amore, R.",
affiliation = "{Instituto Nacional de Pesquisas Espaciais (INPE)} and {Instituto
Tecnol{\'o}gico de Aeron{\'a}utica (ITA)}",
title = "A tolerant JPEG-LS image compressor foreseeing COTS FPGA
implementation",
journal = "Microprocessors and Microsystems",
year = "2017",
volume = "49",
pages = "54--63",
month = "Mar.",
keywords = "COTS FPGA, Fault injection, Fault-tolerance mechanisms, Image
compression, LEO, Susceptibility evaluation, VHDL simulations.",
abstract = "A compact solution for onboard tolerant image compression is
studied and the effectiveness of the soft-error mitigation
strategy is evaluated by using a simulation-based susceptibility
analysis method. The low complexity JPEG-LS compression algorithm
allows considering medium-size flash or antifuse COTS FPGAs as a
target for future use in small satellites. Fault mitigation
methods, like Triple Modular Redundancy and Hamming code, with
scrubbing to mitigate residual error accumulation, were selected
taking into account operation in LEO space missions. The results
point out the viability of implementing a tolerant image
compression system in a single device with two orders-of-magnitude
reduction in the susceptibility estimate based on a non-tolerant
reference VHDL code. The effectiveness of the mitigation strategy,
the injection model accuracy and possible improvements are
discussed herein.",
doi = "10.1016/j.micpro.2017.01.008",
url = "http://dx.doi.org/10.1016/j.micpro.2017.01.008",
issn = "0141-9331",
language = "en",
targetfile = "lopes filho_tolerant.pdf",
urlaccessdate = "27 abr. 2024"
}